040-fix-mips-ICE-PR-68400.patch (665B)
1 --- a/gcc/config/mips/mips.c 2 +++ b/gcc/config/mips/mips.c 3 @@ -8001,9 +8001,17 @@ mask_low_and_shift_p (machine_mode mode, 4 bool 5 and_operands_ok (machine_mode mode, rtx op1, rtx op2) 6 { 7 - return (memory_operand (op1, mode) 8 - ? and_load_operand (op2, mode) 9 - : and_reg_operand (op2, mode)); 10 + if (!memory_operand (op1, mode)) 11 + return and_reg_operand (op2, mode); 12 + 13 + if (!and_load_operand (op2, mode)) 14 + return false; 15 + 16 + if (!TARGET_MIPS16 || si_mask_operand(op2, mode)) 17 + return true; 18 + 19 + op1 = XEXP (op1, 0); 20 + return !(REG_P (op1) && REGNO (op1) == STACK_POINTER_REGNUM); 21 } 22 23 /* The canonical form of a mask-low-and-shift-left operation is