0002-add-mips-support.patch (17141B)
1 From 2c67c6f51ce5bab18c79f4304ccf42716f59f13c Mon Sep 17 00:00:00 2001 2 From: John Crispin <blogic@openwrt.org> 3 Date: Thu, 23 Jul 2015 13:21:25 +0200 4 Subject: [PATCH 2/4] add mips support 5 6 Signed-off-by: John Crispin <blogic@openwrt.org> 7 --- 8 include/mips/mediatek.h | 39 ++++++ 9 src/mips/CMakeLists.txt | 6 + 10 src/mips/mediatek.c | 349 +++++++++++++++++++++++++++++++++++++++++++++++ 11 src/mips/mips.c | 60 ++++++++ 12 4 files changed, 454 insertions(+) 13 create mode 100644 include/mips/mediatek.h 14 create mode 100644 src/mips/CMakeLists.txt 15 create mode 100644 src/mips/mediatek.c 16 create mode 100644 src/mips/mips.c 17 18 --- /dev/null 19 +++ b/include/mips/mediatek.h 20 @@ -0,0 +1,39 @@ 21 +/* 22 + * Author: Thomas Ingleby <thomas.c.ingleby@intel.com> 23 + * Author: Michael Ring <mail@michael-ring.org> 24 + * Copyright (c) 2014 Intel Corporation. 25 + * 26 + * Permission is hereby granted, free of charge, to any person obtaining 27 + * a copy of this software and associated documentation files (the 28 + * "Software"), to deal in the Software without restriction, including 29 + * without limitation the rights to use, copy, modify, merge, publish, 30 + * distribute, sublicense, and/or sell copies of the Software, and to 31 + * permit persons to whom the Software is furnished to do so, subject to 32 + * the following conditions: 33 + * 34 + * The above copyright notice and this permission notice shall be 35 + * included in all copies or substantial portions of the Software. 36 + * 37 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 38 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 39 + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 40 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE 41 + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 42 + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 43 + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 44 + */ 45 + 46 +#pragma once 47 + 48 +#ifdef __cplusplus 49 +extern "C" { 50 +#endif 51 + 52 +#include "mraa_internal.h" 53 + 54 +mraa_board_t * 55 + mraa_mtk_linkit(); 56 + 57 +#ifdef __cplusplus 58 +} 59 +#endif 60 --- /dev/null 61 +++ b/src/mips/CMakeLists.txt 62 @@ -0,0 +1,6 @@ 63 +message (INFO " - Adding MIPS platforms") 64 +set (mraa_LIB_PLAT_SRCS_NOAUTO ${mraa_LIB_SRCS_NOAUTO} 65 + ${PROJECT_SOURCE_DIR}/src/mips/mips.c 66 + ${PROJECT_SOURCE_DIR}/src/mips/mediatek.c 67 + PARENT_SCOPE 68 +) 69 --- /dev/null 70 +++ b/src/mips/mediatek.c 71 @@ -0,0 +1,349 @@ 72 +/* 73 + * Author: Thomas Ingleby <thomas.c.ingleby@intel.com> 74 + * Author: Michael Ring <mail@michael-ring.org> 75 + * Copyright (c) 2014 Intel Corporation. 76 + * 77 + * Permission is hereby granted, free of charge, to any person obtaining 78 + * a copy of this software and associated documentation files (the 79 + * "Software"), to deal in the Software without restriction, including 80 + * without limitation the rights to use, copy, modify, merge, publish, 81 + * distribute, sublicense, and/or sell copies of the Software, and to 82 + * permit persons to whom the Software is furnished to do so, subject to 83 + * the following conditions: 84 + * 85 + * The above copyright notice and this permission notice shall be 86 + * included in all copies or substantial portions of the Software. 87 + * 88 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 89 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 90 + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 91 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE 92 + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 93 + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 94 + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 95 + */ 96 + 97 +#include <stdio.h> 98 +#include <stdint.h> 99 +#include <stdlib.h> 100 +#include <string.h> 101 +#include <sys/mman.h> 102 +#include <mraa/common.h> 103 + 104 +#include "mraa_internal.h" 105 + 106 +#include "common.h" 107 + 108 +#define PLATFORM_MEDIATEK_LINKIT 1 109 +#define PLATFORM_MEDIATEK_LINKIT_AIR 2 110 +#define MMAP_PATH "/dev/mem" 111 +#define MT7628_GPIO_BASE 0x100 112 +#define MT7628_BLOCK_SIZE (4 * 1024) 113 +#define MT7628_GPIO_CTRL 0x00 114 +#define MT7628_GPIO_DATA 0x20 115 +#define MT7628_GPIO_SET 0x30 116 +#define MT7628_GPIO_CLEAR 0x40 117 + 118 +#define MAX_SIZE 64 119 + 120 +// MMAP 121 +static uint8_t* mmap_reg = NULL; 122 +static int mmap_fd = 0; 123 +static int mmap_size; 124 +static unsigned int mmap_count = 0; 125 +static int platform_detected = 0; 126 + 127 +mraa_result_t 128 +mraa_mtk_linkit_mmap_write(mraa_gpio_context dev, int value) 129 +{ 130 + volatile uint32_t* addr; 131 + if (value) { 132 + *(volatile uint32_t*) (mmap_reg + MT7628_GPIO_SET + (dev->pin / 32) * 4) = 133 + (uint32_t)(1 << (dev->pin % 32)); 134 + } else { 135 + *(volatile uint32_t*) (mmap_reg + MT7628_GPIO_CLEAR + (dev->pin / 32) * 4) = 136 + (uint32_t)(1 << (dev->pin % 32)); 137 + } 138 + return MRAA_SUCCESS; 139 +} 140 + 141 +static mraa_result_t 142 +mraa_mtk_linkit_mmap_unsetup() 143 +{ 144 + if (mmap_reg == NULL) { 145 + syslog(LOG_ERR, "linkit mmap: null register can't unsetup"); 146 + return MRAA_ERROR_INVALID_RESOURCE; 147 + } 148 + munmap(mmap_reg, mmap_size); 149 + mmap_reg = NULL; 150 + if (close(mmap_fd) != 0) { 151 + return MRAA_ERROR_INVALID_RESOURCE; 152 + } 153 + return MRAA_SUCCESS; 154 +} 155 + 156 +int 157 +mraa_mtk_linkit_mmap_read(mraa_gpio_context dev) 158 +{ 159 + uint32_t value = *(volatile uint32_t*) (mmap_reg + MT7628_GPIO_DATA + (dev->pin / 32) * 4); 160 + if (value & (uint32_t)(1 << (dev->pin % 32))) { 161 + return 1; 162 + } 163 + return 0; 164 +} 165 + 166 +mraa_result_t 167 +mraa_mtk_linkit_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en) 168 +{ 169 + if (dev == NULL) { 170 + syslog(LOG_ERR, "linkit mmap: context not valid"); 171 + return MRAA_ERROR_INVALID_HANDLE; 172 + } 173 + 174 + if (en == 0) { 175 + if (dev->mmap_write == NULL && dev->mmap_read == NULL) { 176 + syslog(LOG_ERR, "linkit mmap: can't disable disabled mmap gpio"); 177 + return MRAA_ERROR_INVALID_PARAMETER; 178 + } 179 + dev->mmap_write = NULL; 180 + dev->mmap_read = NULL; 181 + mmap_count--; 182 + if (mmap_count == 0) { 183 + return mraa_mtk_linkit_mmap_unsetup(); 184 + } 185 + return MRAA_SUCCESS; 186 + } 187 + 188 + if (dev->mmap_write != NULL && dev->mmap_read != NULL) { 189 + syslog(LOG_ERR, "linkit mmap: can't enable enabled mmap gpio"); 190 + return MRAA_ERROR_INVALID_PARAMETER; 191 + } 192 + 193 + // Might need to make some elements of this thread safe. 194 + // For example only allow one thread to enter the following block 195 + // to prevent mmap'ing twice. 196 + if (mmap_reg == NULL) { 197 + if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) { 198 + syslog(LOG_ERR, "linkit map: unable to open resource0 file"); 199 + return MRAA_ERROR_INVALID_HANDLE; 200 + } 201 + 202 + mmap_reg = (uint8_t*) mmap(NULL, MT7628_BLOCK_SIZE, PROT_READ | PROT_WRITE, 203 + MAP_FILE | MAP_SHARED, mmap_fd, MT7628_GPIO_BASE); 204 + if (mmap_reg == MAP_FAILED) { 205 + syslog(LOG_ERR, "linkit mmap: failed to mmap"); 206 + mmap_reg = NULL; 207 + close(mmap_fd); 208 + return MRAA_ERROR_NO_RESOURCES; 209 + } 210 + } 211 + dev->mmap_write = &mraa_mtk_linkit_mmap_write; 212 + dev->mmap_read = &mraa_mtk_linkit_mmap_read; 213 + mmap_count++; 214 + 215 + return MRAA_SUCCESS; 216 +} 217 + 218 +mraa_board_t* 219 +mraa_mtk_linkit() 220 +{ 221 + mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t)); 222 + if (b == NULL) { 223 + return NULL; 224 + } 225 + 226 + b->platform_name = "LINKIT"; 227 + platform_detected = PLATFORM_MEDIATEK_LINKIT; 228 + b->phy_pin_count = 31; 229 + 230 + b->aio_count = 0; 231 + b->adc_raw = 0; 232 + b->adc_supported = 0; 233 + b->pwm_default_period = 500; 234 + b->pwm_max_period = 2147483; 235 + b->pwm_min_period = 1; 236 + 237 + b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count); 238 + 239 + advance_func->gpio_mmap_setup = &mraa_mtk_linkit_mmap_setup; 240 + 241 + strncpy(b->pins[0].name, "P0", MRAA_PIN_NAME_SIZE); 242 + b->pins[0].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; 243 + 244 + strncpy(b->pins[1].name, "P1", MRAA_PIN_NAME_SIZE); 245 + b->pins[1].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; 246 + 247 + strncpy(b->pins[2].name, "P2", MRAA_PIN_NAME_SIZE); 248 + b->pins[2].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; 249 + 250 + strncpy(b->pins[3].name, "P3", MRAA_PIN_NAME_SIZE); 251 + b->pins[3].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; 252 + 253 + strncpy(b->pins[4].name, "P4", MRAA_PIN_NAME_SIZE); 254 + b->pins[4].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; 255 + 256 + strncpy(b->pins[5].name, "P5", MRAA_PIN_NAME_SIZE); 257 + b->pins[5].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; 258 + 259 + strncpy(b->pins[6].name, "P6", MRAA_PIN_NAME_SIZE); 260 + b->pins[6].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; 261 + 262 + strncpy(b->pins[7].name, "P7", MRAA_PIN_NAME_SIZE); 263 + b->pins[7].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; 264 + 265 + strncpy(b->pins[8].name, "P8", MRAA_PIN_NAME_SIZE); 266 + b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; 267 + b->pins[8].gpio.pinmap = 21; 268 + b->pins[8].uart.parent_id = 2; 269 + b->pins[8].uart.mux_total = 0; 270 + 271 + strncpy(b->pins[9].name, "P9", MRAA_PIN_NAME_SIZE); 272 + b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; 273 + b->pins[9].gpio.pinmap = 20; 274 + b->pins[9].uart.parent_id = 2; 275 + b->pins[9].uart.mux_total = 0; 276 + 277 + strncpy(b->pins[10].name, "P10", MRAA_PIN_NAME_SIZE); 278 + b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; 279 + b->pins[10].gpio.pinmap = 2; 280 + 281 + strncpy(b->pins[11].name, "P11", MRAA_PIN_NAME_SIZE); 282 + b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; 283 + b->pins[11].gpio.pinmap = 3; 284 + 285 + strncpy(b->pins[12].name, "P12", MRAA_PIN_NAME_SIZE); 286 + b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; 287 + b->pins[12].gpio.pinmap = 0; 288 + 289 + strncpy(b->pins[13].name, "P13", MRAA_PIN_NAME_SIZE); 290 + b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; 291 + b->pins[13].gpio.pinmap = 1; 292 + 293 + strncpy(b->pins[14].name, "P14", MRAA_PIN_NAME_SIZE); 294 + b->pins[14].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; 295 + 296 + strncpy(b->pins[15].name, "P15", MRAA_PIN_NAME_SIZE); 297 + b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; 298 + b->pins[15].gpio.pinmap = 44; 299 + 300 + strncpy(b->pins[16].name, "P16", MRAA_PIN_NAME_SIZE); 301 + b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; 302 + b->pins[16].gpio.pinmap = 46; 303 + b->pins[16].uart.parent_id = 1; 304 + b->pins[16].uart.mux_total = 0; 305 + 306 + strncpy(b->pins[17].name, "P17", MRAA_PIN_NAME_SIZE); 307 + b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; 308 + b->pins[17].gpio.pinmap = 45; 309 + b->pins[17].uart.parent_id = 1; 310 + b->pins[17].uart.mux_total = 0; 311 + 312 + strncpy(b->pins[18].name, "P18", MRAA_PIN_NAME_SIZE); 313 + b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; 314 + b->pins[18].gpio.pinmap = 13; 315 + b->pins[18].uart.parent_id = 1; 316 + b->pins[18].uart.mux_total = 0; 317 + 318 + strncpy(b->pins[19].name, "P19", MRAA_PIN_NAME_SIZE); 319 + b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; 320 + b->pins[19].gpio.pinmap = 12; 321 + b->pins[19].uart.parent_id = 0; 322 + b->pins[19].uart.mux_total = 0; 323 + 324 + strncpy(b->pins[20].name, "P20", MRAA_PIN_NAME_SIZE); 325 + b->pins[20].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }; 326 + b->pins[20].gpio.pinmap = 5; 327 + b->pins[20].i2c.pinmap = 0; 328 + b->pins[20].i2c.mux_total = 0; 329 + 330 + strncpy(b->pins[21].name, "P21", MRAA_PIN_NAME_SIZE); 331 + b->pins[21].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }; 332 + b->pins[21].gpio.pinmap = 4; 333 + b->pins[21].i2c.pinmap = 0; 334 + b->pins[21].i2c.mux_total = 0; 335 + 336 + strncpy(b->pins[22].name, "P22", MRAA_PIN_NAME_SIZE); 337 + b->pins[22].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }; 338 + b->pins[22].gpio.pinmap = 8; 339 + b->pins[22].spi.pinmap = 0; 340 + b->pins[22].spi.mux_total = 0; 341 + 342 + strncpy(b->pins[23].name, "P23", MRAA_PIN_NAME_SIZE); 343 + b->pins[23].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }; 344 + b->pins[23].gpio.pinmap = 9; 345 + b->pins[23].spi.pinmap = 0; 346 + b->pins[23].spi.mux_total = 0; 347 + 348 + strncpy(b->pins[24].name, "P24", MRAA_PIN_NAME_SIZE); 349 + b->pins[24].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }; 350 + b->pins[24].gpio.pinmap = 7; 351 + b->pins[24].spi.pinmap = 0; 352 + b->pins[24].spi.mux_total = 0; 353 + 354 + strncpy(b->pins[25].name, "P25", MRAA_PIN_NAME_SIZE); 355 + b->pins[25].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }; 356 + b->pins[25].gpio.pinmap = 6; 357 + b->pins[25].spi.pinmap = 0; 358 + b->pins[25].spi.mux_total = 0; 359 + 360 + strncpy(b->pins[26].name, "P26", MRAA_PIN_NAME_SIZE); 361 + b->pins[26].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }; 362 + b->pins[26].gpio.pinmap = 18; 363 + 364 + strncpy(b->pins[27].name, "P27", MRAA_PIN_NAME_SIZE); 365 + b->pins[27].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }; 366 + b->pins[27].gpio.pinmap = 19; 367 + 368 + strncpy(b->pins[28].name, "P28", MRAA_PIN_NAME_SIZE); 369 + b->pins[28].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; 370 + b->pins[28].gpio.pinmap = 16; 371 + 372 + strncpy(b->pins[29].name, "P29", MRAA_PIN_NAME_SIZE); 373 + b->pins[29].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; 374 + b->pins[29].gpio.pinmap = 17; 375 + 376 + strncpy(b->pins[30].name, "P30", MRAA_PIN_NAME_SIZE); 377 + b->pins[30].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; 378 + b->pins[30].gpio.pinmap = 14; 379 + 380 + strncpy(b->pins[31].name, "P31", MRAA_PIN_NAME_SIZE); 381 + b->pins[31].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; 382 + b->pins[31].gpio.pinmap = 15; 383 + 384 + // BUS DEFINITIONS 385 + b->i2c_bus_count = 1; 386 + b->def_i2c_bus = 0; 387 + b->i2c_bus[0].bus_id = 0; 388 + b->i2c_bus[0].sda = 20; 389 + b->i2c_bus[0].scl = 21; 390 + 391 + b->spi_bus_count = 1; 392 + b->def_spi_bus = 0; 393 + b->spi_bus[0].bus_id = 0; 394 + b->spi_bus[0].slave_s = 0; 395 + b->spi_bus[0].cs = 25; 396 + b->spi_bus[0].mosi = 22; 397 + b->spi_bus[0].miso = 23; 398 + b->spi_bus[0].sclk = 21; 399 + 400 + b->uart_dev_count = 3; 401 + b->def_uart_dev = 0; 402 + b->uart_dev[0].rx = 18; 403 + b->uart_dev[0].tx = 19; 404 + 405 + b->uart_dev[1].rx = 16; 406 + b->uart_dev[1].tx = 17; 407 + 408 + b->uart_dev[2].rx = 9; 409 + b->uart_dev[2].tx = 8; 410 + 411 + b->gpio_count = 0; 412 + int i; 413 + for (i = 0; i < b->phy_pin_count; i++) { 414 + if (b->pins[i].capabilites.gpio) { 415 + b->gpio_count++; 416 + } 417 + } 418 + 419 + return b; 420 +} 421 --- /dev/null 422 +++ b/src/mips/mips.c 423 @@ -0,0 +1,60 @@ 424 +/* 425 + * Author: Thomas Ingleby <thomas.c.ingleby@intel.com> 426 + * Author: Michael Ring <mail@michael-ring.org> 427 + * Copyright (c) 2014 Intel Corporation. 428 + * 429 + * Permission is hereby granted, free of charge, to any person obtaining 430 + * a copy of this software and associated documentation files (the 431 + * "Software"), to deal in the Software without restriction, including 432 + * without limitation the rights to use, copy, modify, merge, publish, 433 + * distribute, sublicense, and/or sell copies of the Software, and to 434 + * permit persons to whom the Software is furnished to do so, subject to 435 + * the following conditions: 436 + * 437 + * The above copyright notice and this permission notice shall be 438 + * included in all copies or substantial portions of the Software. 439 + * 440 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 441 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 442 + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 443 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE 444 + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 445 + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 446 + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 447 + */ 448 + 449 +#include <stdlib.h> 450 +#include <string.h> 451 + 452 +#include "mraa_internal.h" 453 +#include "mips/mediatek.h" 454 + 455 +mraa_platform_t 456 +mraa_mips_platform() 457 +{ 458 + mraa_platform_t platform_type = MRAA_UNKNOWN_PLATFORM; 459 + size_t len = 100; 460 + char* line = malloc(len); 461 + FILE* fh = fopen("/proc/cpuinfo", "r"); 462 + if (fh != NULL) { 463 + while (getline(&line, &len, fh) != -1) { 464 + if (strncmp(line, "machine", 7) == 0) { 465 + if (strstr(line, "MediaTek LinkIt Smart 7688")) { 466 + platform_type = MRAA_MTK_LINKIT; 467 + } 468 + } 469 + } 470 + fclose(fh); 471 + } 472 + free(line); 473 + 474 + switch (platform_type) { 475 + case MRAA_MTK_LINKIT: 476 + plat = mraa_mtk_linkit(); 477 + break; 478 + default: 479 + plat = NULL; 480 + syslog(LOG_ERR, "Unknown Platform, currently not supported by MRAA"); 481 + } 482 + return platform_type; 483 +}